There has been known a technique of additionally implanting an impurity in a part of a source/drain region of a MOS transistor to which a contact plug is connected to reduce an electric resistance of a connected part of the source/drain region and the contact plug. This additional implantation of an impurity is performed through a contact hole formed in an insulating film on a source/drain region.
When this technique is applied to a case of manufacturing an n-type transistor and a p-type transistor on a same substrate, a mask for closing a contact hole on a source/drain region of a different conductive type from that of the impurity is used to selectively implant a conductive impurity in a source/drain region of a same conductive type as that of the impurity. However, because a photolithography process for forming the mask is required, the number of manufacturing processes is increased.
Further, there has been known a technique of implanting an impurity in a direction tilted from a direction vertical to a region in a substrate between transistors as an implant direction where an impurity enters. When an impurity enters in the direction tilted from the vertical direction, an impurity diffusion region extends largely toward the direction where an impurity enters. Accordingly, when a region that becomes a current path such as a source/drain region is formed, there is a possibility of occurrence of a short channel effect.